Sr. Systems/Algorithm Engineer...

Sr. Systems/Algorithm Engineer

Santa Clara, CA 95052 2016-11-04 - –

intel Intel

Job Description

Intel is in the midst of an exciting transformation, going beyond being a company that makes the world's best chips to one that also delivers wonderful experiences for people.With help from talented employees like you, we will tightly integrate hardware, software and services into compelling experiences in pursuit of our mission, and utilize the power of Moore's Law to bring smart, connected devices to every person on Earth.About this position…As a Sr. member of Intel's BCP PHY Systems/Algorithms team developing multi-comm, SoC solutions for the mobile, portable, wearable and IoT wireless markets, you will work on system definition and design, performance analysis, trouble shooting, verification of Bluetooth (BT) radio transceivers and baseband. You will work closely with Multi-Comm SoC, silicon design teams, firmware development teams, integration validation test teams, to create robust solutions meeting or exceeding the market requirements for both OEM and end-user customers. You must be a critical thinker, have strong self-direction, and be able to communicate clearly.Typical job tasks include: – Develop algorithms, performance simulation for digital wireless communication systems.- Specifying signal processing logic for communication SOC.- Lab bring-up of reference boards, performance evaluation and system debugging.- Generate and own documentation detailing system and HW specifications and requirements

Qualifications

Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Qualifications listed as preferred or additional will be considered a plus factor for applicants.Minimum Requirements: – Master's degree in Electrical/Electronics Engineering and 8+ years of System Design experience or PhD in Electrical/Electronics Engineering and 6+ years of System Design Experience – 5+ years of experience in Designing and implementing Digital Communications and Signal Processing Blocks (e.g. Optimal Receivers, Filters, PLL Control Loops, Synchronization Algorithms, Timing/Carrier Frequency Recovery Schemes, Channel Estimation, Error Correction Coding, RF Imperfection Calibration and Compensation). – 5+ years of experience in C/C++ Embedded Programming. – 5+ years of experience with Matlab. – 3+ years of experience with Fixed Point Simulations of Communication Systems as well as working with Digital RTL Designers during IC Verification and Validation Phases. – 3+ years of experience in System Integration Bring-Up.- Worked on Development, Tuning and Optimization of at least One Wireless Product that reached Mass Production/Mass Volume Stage. Preferred Requirements: – Good Mathematical and Analytical Skills. – Exposure and working knowledge in Architecture of RF Receive and Transmit Chains. – Thorough understanding of CMOS RF Imperfections and Performance Tuning.- Knowledge and experience in Bluetooth Receiver and Transmitter Design.- Experience with other Wireless/Wired Communication Systems (such with WiFi/Cellular/Zigbee/DSL/Cable/Ethernet) are also helpful. – Knowledge of SystemC and RTL, as well as other High Level Synthesizer Tools/Methodologies (such as Synphony C Compiler, and C-to-Silicon Compiler).

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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